It is important to provide a useful and cost effective approach for allowing emulation and debug of a data processing system, particularly when the data processing system is implemented on an integrated circuit with limited pins or terminals to communicate information. Most emulation and debug approaches provide a mechanism to allow observability and controllability of portions of circuitry within the data processing system. One such emulation and debug approach is the OnCE.TM. circuitry and methodology used on a variety of integrated circuits available from Motorola, Inc. of Austin, Tex. The use of serial scan chains is yet another approach that may be used. In addition, the serial scan approach may take advantage of the JTAG (Joint Test Action Group) specification which defines a hardware interface and a serial communication protocol.
In determining an approach to be used for emulation and debug of a data processing system, a tradeoff is usually required between the ease of use and the amount observability and controllability on the one hand, and the amount of special emulation and debug circuitry that must be added on the other hand. A solution was needed which would allow the maximum observability and controllability for emulation and debug as possible, while adding the least amount of special emulation and debug circuitry that is not also used during normal operation. In a solution was needed which would allow maximum observability and controllability, but which would not significantly impact the internal operation and speed of the data processing system.